This invention relates to transistor amplifier circuits, and more particularly, to a power amplifier circuit having a self-bias boosting circuit for achieving higher output power and linearity as input power increases.
A linear RF power amplifier is commonly biased in class AB operation so as to achieve higher power-added efficiency. Such an amplifier is commonly used in the output stage of high-frequency power amplifiers. However, in a conventionally biased class AB amplifier, the average bias supply current increases as RF input power increases. This increased average current results in an increased voltage drop in the resistive part of the bias circuit. This in turn reduces the average voltage drop across the forward-biased PN junction of the power amplifying transistor, pushing the amplifier into class B and even class C operations. Therefore, the output power will be saturated as the input power further increases.
To overcome this problem, a boosting circuitry is usually used to increase the bias of the power transistor, such as a bias boosting circuitry, a self-bias boost scheme or an adjustable self-bias boost scheme.
In addition to the boosting of the voltage drop across the base-emitter junction of the amplifying transistor, linearity shall also be considered for the power amplifier. Linearity and power-added efficiency are two contradictory requirements in a power amplifier. A tradeoff between the linearity and power-added efficiency is needed for given specifications for the power amplifier. It is usually done by achieving the highest power-added efficiency for a given linearity requirement. This requires a good control of the quiescent current of the power amplifier. To do so, an impedance-controllable biasing scheme is suggested to be used to provide independent control of quiescent current of the power amplifier. Therefore, it could achieve high power-added efficiency while maintaining its linearity by properly controlling the quiescent current. However, such a scheme is not simple and compact enough.
Therefore, the object of the present invention is to provide a power amplifier circuit with a novel biasing scheme which is simple but capable of providing both self-bias boosting capacity and good controlling of quiescent current of the power transistor.
To achieve the above object, the power amplifier circuit of the present invention comprises an amplifying transistor and a dc bias circuit comprising a novel self-bias boosting circuit. The self-bias boosting circuit comprises a charging circuit for charging the amplifying transistor at a charging rate and a discharging circuit for discharging the amplifying transistor at a discharging rate. The self-bias boosting circuit is configured such that the charging rate is faster than the discharging rate, thus the voltage drop across the PN junction of the amplifying transistor is boosted as the input power increases.
In particular, the self-bias boosting circuit is an enhanced Wilson current mirror with a current source and an output terminal coupled to a control terminal of the amplifying transistor, preferably through a bias resistor. The current source and the bias resistor are controllable to make the charging rate faster than the discharging rate. Furthermore, the current source of the enhanced Wilson current mirror dictates the quiescent current of the amplifying transistor. Preferably, the quiescent current may be set as in direct proportion to the current source by scaling the emitter area ratios between transistor pairs.